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FPGA Verification / Design Engineer

ID:  2558
Function:  Operations
Location: 

Basak, Lapu-Lapu City, PH


Organization & Role

Teradyne is looking for talented people, who share our passion and drive, to join our team. Our customers are the world’s leading electronics companies and they depend on us to help them get quality products to market. At Teradyne, we ride the wave of technological innovation every day. It’s an exciting business! If being part of a global team is something that excites you, Teradyne may be the place for you.

Duties & Responsibilities

•    Uses FPGA design specifications and PCB schematic knowledge.
•    Develops and maintain a FPGA verification environment for major design platforms.
•    Verify RTL from FPGA design engineers by creating bus functional reference models that represent circuits on PCB’s.  
•    Develops FPGA Verification tests that properly exercises the logic.
•    Communicate and verify test coverage with the designers, and implement these in a timely and high-quality manner using SystemVerilog or Verilog, synthesis tools, simulation tools for the following:
-    PCIe,High speed ADC’s and DAC’s,DDR memory,AXI Interface etc,SPI / I2C,LVDS,JTAG ,UART
•    Assist Hardware engineering team during integration phase by creating automated, constrained randomized test-benches and debug flow problems in order to narrow down the issue. 
•    Develops and own functional blocks to be used on multiple platforms in order to enable regression and re-use of code. 
•    Perform debugging using lab equipment.
•    Develop scripting (Python) for test and verification.

Basic Qualifications & Skills

•    BS Electrical or Electronics Engineer
•    With 10 Years FPGA design experience from design requirements to synthesis and simulations.
-    DDR memories , RTL debugging, AXI interface, Verilog
•    At least 5+ years of experience on:
-    Functional Verification as well as constrained randomized verification.
-    SoC of Xilinx, Intel
-    System Verilog
-    Bus Functional models

•    Also has knowledge on the following tools 
-    Xilinx Vivado EDA tool, Intel Quartus Prime,Cadence Xcelium Logic Simulation

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment.

 

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