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Sr. ASIC/FPGA Design Verification Engineer (Compute Test Division; North Reading, MA)

Date: Dec 20, 2025

Company: Teradyne

Sorry, this position has been filled.

© Teradyne Inc. 1994-2025 All rights reserved. Teradyne is an equal opportunity/affirmative action employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, gender identity and expression, ethnicity or national origin, age, marital status, genetic information, military service, pregnancy, political affiliation, union membership, disability status, protected veteran status, or any other characteristic protected by law. ATTENTION APPLICANTS WITH DISABILITIES: If you're unable to access Teradyne's on-line job application due to a disability you may visit any one of our locations including our Corporate Office at 600 Riverpark Drive, North Reading, MA and request a paper application form. In addition, you may also contact the HR Service Center by phone at 978-370-3041 or email at HR.Service.Center@teradyne.com for additional assistance. We are a VEVRAA Federal Contractor. In compliance with US Labor Laws pertaining to “Pay Transparency Nondiscrimination Provision”, details can be viewed in this link, https://bit.ly/3iBiwO1. Please be aware of fraudulent hiring representation. All legitimate communications from the company will come from a Teradyne employee with the @teradyne.com domain. If you have any concerns that a communication may be fraudulent and you would like to confirm whether it is, please navigate and reach out through the Contact Us page.