High Speed Serial Instrument Architect

Teradyne (NYSE:TER) is a leading supplier of Automatic Test Equipment used to test complex electronics in the consumer electronics, automotive, computing, telecommunications, and aerospace and defense industries. Teradyne tests devices that make many of today's electronics products possible.

Organization and Role

The Teradyne Hardware Engineering team is looking for a highly-motivated, energetic, technically driven Hardware Architect to focus on the development of high speed serial device automated test equipment products. Development occurs in a dynamic and challenging multi-site development environment.

Responsibilities

• Work with customers, in collaboration with marketing and system engineering, to define product requirements.
• Collaborate with systems engineering to develop product architectures based on customer requirements.
• Define and execute prototyping and characterization experiments.
• Work with the HW, LD and SW teams to document and implement test products.
• Act as technical lead for project teams, directing/mentoring junior engineers.
• Hands-on execution of product integration and verification testing and debug.
• Provide technical customer support on released products as required.

Qualifications/Skills

• Expert knowledge of the PHY and link layers of one or more of the following high speed serial protocols: MIPI C/D-PHY, DisplayPort, PCIe, 10/100/400GE.
• Experience developing products that run at link rates in excess of 10Gbps.
• Experience with automated test equipment (ATE) systems, semiconductor device testing, probe cards and DUT interface boards.
• Solid understanding of high speed signal integrity/transmission line theory including: equalization, clock and data recovery, encoding, pre/post emphasis, impedance matching, eye scan etc.
• Familiarity with CMOS Image Sensor devices.
• Experience with RTL coding in Verilog and digital simulation/verification.
• Deep understanding of FPGA high speed serial transceivers from both Xilinx and Altera.
• Experience with FPGA development tools to perform floor-planning, place and route, static timing analysis, internal logic analyzer insertion and bitfile generation.
• Printed circuit board design experience: schematic capture, PCB layout and lab validation.
• Familiarity with low noise analog circuit design techniques is a plus.
• Technologies: Xilinx and/or Intel FPGAs. PCIe, AXI, DDRx, SERDES, USB, I2C, SPI, 10/100GE, PLL, HBM, DLL, MIPI, DisplayPort, PRBS.
• Languages: Expertise in Verilog and a scripting language (Python, TCL, PERL…) required. Familiarity with System Verilog, UVM, VHDL, C,  C++ preferred.
• Operating Systems: Windows, Linux
• Development Tools: Cadence(Xcellium), Synopsys(Spyglass CDC/LINT), Xilinx(Vivado), Intel(Quartus), revision control tools(Clearcase, GIT, SVN), bug tracking tools(JIRA or other), continuous integration development methodologies and tools. Cadence(Allegro) schematic capture and layout.
• Test equipment: Oscilloscope, spectrum analyzer, BERT, AWG, VNA.
• Excellent troubleshooting, debugging, and problem solving skills.
• Experience working in cross-functional teams designing complex systems
• Solid verbal, written and presentation skills.
• Commitment to excellence, efficiency, and product quality

Education/Experience

• Master’s degree in electrical engineering or related field from a top university or engineering institution.
• Minimum of 15 years of practical hardware development experience