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Applications Engineer ATE Memory Test

ID:  560
Function:  Engineering
Location: 

San Jose, CA, US


Organization & Role

Teradyne (NYSE:TER) is a leading supplier of Automatic Test Equipment used to test complex electronics in the consumer electronics, automotive, computing, telecommunications, and aerospace and defense industries.  Teradyne tests devices that make many of today's electronics products possible.

Responsibilities

We are currently seeking a Applications Engineer ATE Memory Test, for a position based in Folsom, CA.  As a Applications Engineer ATE Memory Test, you will also become a part of, and report to, the Nextest Division’s Application team located in our San Jose, CA office. You will interact with our factory based Engineers as well as our Customers. You will have the opportunity to experience a range of activities, which vary week-to-week and sometimes day-to-day. These include:

 

  • Pre-Sales Customer technical support
  • Post-Sales Customer technical support
  • Technical demonstration creation, documentation, and presentation
  • Technical presentations to large and small groups of engineers
  • Training course creation and presentation
  • Technical documentation creation / review
  • Technical / Marketing support for Engineering

Basic Qualifications & Skills

 

  • Proficiency in C / C++ programming
  • Understanding of modern memory semiconductor device architectures, specifications, and design considerations
  • Ability to "think on your feet" and use a "problem solving mindset" in sometimes stressful problem solving scenarios
  • Strong English & technical communication skills (both verbal and written)
  • Strong interpersonal skills
  • Be local to Folsom, CA area
  • 4+ years of Flash Memory semiconductor test experience (specifying, creating, debugging, and correlating device final test and/or wafer sort test programs)
  • Willingness to travel, domestically / internationally, sometimes on very short notice

 

  • Preferred Skills:

  • Experience in technical sales environment
  • ONFI compliant semiconductor device test experience
  • 3D XPoint type semiconductor device test experience
  • DRAM semiconductor test experience
  • High speed serial bus test experience
  • Digital/Logic semiconductor test experience
  • Test program creation/debug/correlation for:
    • Nextest Magnum testers
    • Advantest Memory testers

Education

BSEE or equivalent

 

 

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Nearest Major Market: San Jose
Nearest Secondary Market: Palo Alto

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